The present invention generally relates to condition code producing systems for an arithmetic unit. This unit is controlled by a micro program and operates on binary floating point data. The invention relates more particularly to a condition code producing system for checking operand data and operation result data and for setting, in an external condition register; a reserved value or the like which is the result of the checking.
There is a recent change in the floating point arithmetic operation. In other words, due to the notable progress in microprocessor technology, there is a trend toperform floating point arithmetic operations in the microprocessor. As a result, there is a move to set a standard related to the floating point arithmetic operations for the so-called microcomputers, and such a standard is being studied by The Institute of Electrical and Electronics Engineers (hereinafter referred to as IEEE).
According to the IEEE standard, various reserved values such as not-a-number, infinity, zero and a denormalized number are defined, and a processing method different from that of the conventional floating point arithmetic operation is required. However, if the standard related to these reserved values were to be accurately realized by use of the conventional technology, it would result in a slowdown of the arithmetic operation and an increase in the microsteps. Hence, there is a demand to realize an effective system for recognizing the reserved values.
Generally, there are two formats for the binary floating point data, that is, the single-precision format and the double-precision format. In each of the two formats, one binary floating point data is constituted by a sign portion S, an exponent portion EXP and a fraction portion FRAC. With respect to the binary floating point data, the IEEE defines the reserved values as follows.
______________________________________ (1) Not-a-number: EXP=All "1" and FRAC.noteq.All "0"; (2) Infinity: EXP=All "1" and FRAC=All "0"; (3) Zero: EXP=All "0" and FRAC=All "0"; (4) Denormalized number: EXP=All "0" and FRAC.noteq.All "0". ______________________________________
When performing the binary floating point arithmetic operation, a condition is set by the sign portion S, a least significant bit (LSB) and the fraction portion FRAC being not equal to "0", and this condition will be referred to as an external condition in the present specification. The word "external" is used to mean external of an arithmetic logic unit (ALU).
When performing the binary floating point arithmetic operation, the arithmetic processing is performed depending on the external condition of the binary floating point data in a source operand and a destination operand, as will be described later on in the present specification. Accordingly, before performing the binary floating point arithmetic operation, it is necessary to check the external condition of the binary floating point data in the source operand and the destination operand, and furthermore, it is necessary to set the external condition of the binary floating point data, which is obtained as a result of the arithmetic operation, in a status register which can be checked by software.
However, according to the conventional method, the sign portion S, the exponent portion EXP and the fraction portion FRAC are separated by a mask processing of a micro instruction when checking the external condition of each of the binary floating point data. Then, each of the separated sign portion S, exponent portion EXP and fraction portion FRAC are subjected to an arithmetic operation, such as comparison with predetermined values such as data containing all "0" in accordance with the micro instruction. For this reason, there are problems in that the number of steps in the micro instruction becomes extremely large and it takes a long time to detect and process the external condition.